Liquid crystal display and manufacturing method thereof

ABSTRACT

Parasitic capacity between Cs lines and source lines forming a picture element section is reduced, whereby characteristic resistant to crosstalk is achieved, opening ratio is increased, and brightness of LCD is increased.  
     The Cs lines are arranged on the source lines in such a manner as to cover the source lines, and picture element electrodes are arranged and formed on the Cs lines in such a manner as to partially overlap.  
     By forming a structure in which the source lines, the Cs lines and the picture element electrodes are laminated in order, parasitic capacity between the Cs lines and the source lines forming a picture element section can be reduced, and crosstalk can be minimized.  
     As a distance between the source lines and the picture element electrodes can be reduced from the viewpoint of a plan view, opening ratio can be improved.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the invention

[0002] The present invention relates to a liquid crystal displayprovided with a thin film transistor array substrate for use in matrixtype display and to a manufacturing method thereof.

[0003] 2. Description of the prior art

[0004] Generally, a matrix type display comprises a thin film transistorarray substrate (hereinafter referred to as TFT array substrate) onwhich a thin film transistor (hereinafter referred to as TFT) is formed,and an opposition substrate on which color filter, black matrix, etc.are formed. A display material such as liquid crystal is held betweenthe mentioned two substrates, and in which a voltage is selectivelyapplied to the display material.

[0005] In the TFT array substrate, as shown in the equivalent circuit ofFIG. 14, picture elements are arranged forming a matrix.

[0006] In FIG. 14, reference numerals G1, G2, G3 indicate scanningsignal lines (hereinafter referred to as gate lines), and numerals S1,S2, S3 indicate image signal lines (hereinafter referred to as sourcelines). Cs1, Cs2, Cs3 indicate retention capacity electrode lines forforming a retention capacity (hereinafter referred to as Cs lines).

[0007] Further, numerals 1 a to 1 i indicate TFT(s), and charge anddischarge of an electric charge to and from a picture element electrodeis controlled using the TFT(s) as switching element(s). Numerals 2 a to2 i are retention capacities (hereinafter referred to as Cs capacities)which are prepared by forming an insulating film between the pictureelement electrode and the Cs lines. The picture element electrode isformed to be a transparent electrode such as ITO, and forms liquidcrystal capacities 3 a to 3 i holding a liquid crystal between itselfand the opposition electrode. Numerals 4 a to 4 i are parasiticcapacities Cdp formed parasitically between the source lines and thepicture electrode. On/Off operation of the TFT is performed using thegate lines as gate electrodes.

[0008] The picture element electrode is connected to the source linethrough the TFT, and amount of electric charge given to the pictureelement electrode varies depending on signal level of the source line,whereby a potential of the picture element electrode is established. Inresponse to a voltage between the picture element electrode and theopposition electrode, amount of displacement of liquid crystal varies,and amount of a transmitted light through the backside is changed.Accordingly, by controlling the signal level of the source line, opticalsignal change is restrained and displayed in the form of an image.

[0009] To improve image quality, it is necessary to reduce as small aspossible variation in picture element potential due to change in signallevel, of the gate line, etc. For that purpose, total capacity of thepicture element is increased by providing the picture element electrodewith the Cs capacities 2 a to 2 i. The Cs capacities 2 a to 2 i areformed by providing an insulating film between the Cs lines Cs1 to Cs3of the same potential as that of the opposition electrode and thepicture element electrode.

[0010]FIG. 15 shows a picture element layout in the conventional TFTarray substrate. FIG. 16 shows a sectional view of a region A-A of FIG.15 taken in the direction of the arrows. FIGS. 17 and 18 show aconventional method of forming a picture element section taking thesectional view of the A-A region as an example.

[0011] In FIG. 15, reference numeral 102 indicates a gate line, numeral104 indicates a semiconductor thin film, numeral 107 is a source line,numeral 108 is a source electrode, numeral 109 is a drain electrode,numeral 111 is a Cs line, and numeral 114 is a picture elementelectrode.

[0012] In FIG. 16, reference numeral 101 indicates a glass substrate,and numeral 103 indicates a gate insulating film, numeral 105 is ani-layer (a semiconductor layer composed of non-doped amorphous silicon,etc.). Numeral 106 is a n-layer (for example, a semiconductor layercomposed of amorphous silicon, etc. containing n-type impurity), andnumeral 113 is an insulating film. Same reference numerals as thosegiven for the above description are designated to the same or likeparts.

[0013] A manufacturing process of the matrix type display having asectional structure as shown in FIG. 16 is hereinafter described withreference to FIGS. 17 and 18.

[0014] First, as shown in FIG. 17(a), a metal film 102 a to serve as thegate electrode 102 is formed on the glass substrate 101, and then, asshown in FIG. 17(b), a resist pattern 110 a having a planar shapecorresponding to the gate electrode 102 is formed thereon. Using theresist pattern 110 a as an etching mask, an etching is applied to themetal film 102 a, thus the gate electrode 102 is obtained, and then theresist pattern 110 a is removed.

[0015] Then, as shown in FIG. 17(c), the gate insulating film 103,i-layer 105, and n-layer 106 are laminated in order, and as shown inFIG. 17(d), a resist pattern 110 b is formed on the region where thei-layer 105 and the n-layer 106 are left, and using the resist pattern110 b as an etching mask, the n-layer 106 and the i-layer 105 are etchedin order. The resist pattern 110 b is then removed.

[0016] Subsequently, as shown in FIG. 17(e), an ITO thin film 114 a toserve as the picture element electrode 114 is further placed, and asshown in FIG. 18(a), using a resist pattern 110 c patterned into a shapecorresponding to the picture element electrode 114 as an etching mask,the picture element electrode 114 is obtained by etching the ITO thinfilm 114 a. The resist pattern 110 c is then removed.

[0017] Then, as shown in FIG. 18(b), a metal film 112 a to serve assource line 107, source electrode 108, and drain electrode 109 isplaced. And as shown in FIG. 18(c), a resist pattern 110 d correspondingto a region required to serve as source line 107, source electrode 108and drain electrode 109, is patterned. Using the resist pattern 110 d asan etching mask, the metal film 112 a is etched, then the resist pattern110 d is removed, whereby the insulating film 113 is formed. As aresult, a conventional matrix type display of the sectional structureshown in FIG. 16 is obtained.

[0018] Then, structure and function of the conventional TFT ishereinafter described. With reference to the mentioned FIG. 16, when thepicture element electrode 114 is charged with an electric charge, avoltage of about 9V is applied to the source electrode 108, and apositive voltage of about 20V is applied to the gate electrode 102,whereby the TFT is turned on, and the drain electrode 109 and thepicture element electrode 114 are charged approximately to 9V.

[0019] Thereafter, when potential of the picture element electrode 114has sufficiently increased, a negative voltage of about −5V is appliedto the gate electrode 102, whereby the TFT is turned off, and theelectric charge is constrained in the picture element.

[0020] In the conventional picture element structure described above,the picture element electrode 114 is connected to the source line 107through the TFT, and potential of the picture element electrode 114 isestablished depending on signal level of the source line 107. Inresponse to the voltage between the picture element electrode 114 andthe opposition electrode, amount of displacement of the liquid crystalvaries and the transmitted light from the backside is changed.

[0021] Accordingly, by controlling signal level of the source line 107,optical signal change is controlled and displayed in the form of animage.

[0022] Maximum brightness of the liquid crystal display is determined bylight transmittance (transmissivity of light) in the mentioned pictureelement, and the light transmittance becomes higher when area of thepart through which light is transmitted, i.e., aperture in the pictureelement is larger. To achieve a liquid crystal display of highbrightness, it is necessary to increase the area of aperture occupied inthe area of the entire picture element (hereinafter referred to asopening ratio).

[0023] As a method for increasing the opening ratio, it is useful todecrease the distance between the picture element electrode 114 and thesource line 107 in FIG. 15. However, when decreasing the distancebetween the picture element electrode 114 and the source line 107, theparasitic capacity Cdp generated between the source line 107 and thepicture element electrode 114 in FIG. 14 is increased.

[0024] Generally, when varying the source signal, the picture elementpotential is changed through the parasitic capacity Cdp. Variation inthe picture element potential becomes larger, when the parasiticcapacity Cdp is larger and variation in the source signal is larger.When the parasitic capacity Cdp becomes large, a problem of crosstalkoccurs. This problem of crosstalk is hereinafter described withreference to FIG. 14. The crosstalk is a phenomenon that, when amplitudeof the source signal is increased only for writing data in the pictureelement (liquid crystal capacity 3 a) and amplitude of the source signalis decreased for writing data in the other picture elements (liquidcrystal capacities 3 b to 3 i), potential of the picture element havingliquid crystal capacities 3 d, 3 g on the source line S1 is changed bythe increased source signal amplitude for writing data in the pictureelement and having the liquid crystal capacity 3 a, and the pictureelement potential is different from the adjacent picture element havingliquid crystal capacities 3 e, 3 h.

[0025] In this crosstalk, the picture elements other than that havingthe liquid crystal capacity 3 a should be of same display data and samebrightness, but there arises a difference in brightness between thepicture element on the source line S1 and the picture elements on thesource lines S2, S3. In other words, there arises a problem that, as thecrosstalk occurs when decreasing the distance between the pictureelement electrode 114 and the source line 107, it is necessary to securea distance exceeding a certain value between the picture elementelectrode and the source line. As a result, opening ratio of the liquidcrystal display cannot be increased.

[0026] The Japanese Laid-Open Patent Publication (unexamined)288824/1991 disclosed one of the prior arts. This patent publicationshows a liquid crystal display in which a line corresponding to the Csline and the picture element electrode are partially overlapped.

[0027] As discussed above, in the picture element structure of theconventional TFT array substrate, there is a problem that whendecreasing the distance between the picture element electrode and thesource line to improve the opening ratio, the parasitic capacity Cdp isincreased, eventually resulting in occurrence of crosstalk.

[0028] Further, in the array substrate of the conventional active matrixtype liquid crystal display, to form an array, a plurality of gate linesare arranged in row and a plurality of source lines are arranged intrain on an insulating substrate. Further, a TFT and one picture elementcomposed of a picture element electrode connected to the TFT are formedat a crossover position of each gate line and each source line, and anorientation film is formed thereon.

[0029] On the other hand, in the opposition substrate being anothersubstrate for holding the liquid crystal, a common electrode is formedon the insulating substrate, and an orientation film is formed thereon.Surfaces of the array substrate and the opposition substrate on whichthe picture element electrode and the common electrode are formed areput facing to each other, and a liquid crystal composite is held in agap between the two substrates. Usually, as the orientation film isoriented in a direction displaced by 90 degrees between the arraysubstrate side and the opposition substrate side, a TN liquid crystal inwhich liquid crystal particles are arranged twisted by 90 degrees in thedirection of thickness is used.

[0030]FIG. 19 is a plane view showing a picture element of anotherconventional TN type liquid crystal display disclosed in the JapaneseLaid-Open Patent Publication (unexamined) 308533/1994.

[0031] In the drawing, reference numeral 201 indicates a source line,numeral 202 indicates a gate line arranged to crossover the source line201, and numeral 203 is a Cs line forming a Cs capacity which is formedby the same process as the gate line 202. Numeral 204 is a semiconductorlayer forming a channel of the TFT, numeral 205 is a picture elementelectrode, and numeral 206 is a drain electrode of the TFT connected tothe picture element electrode 205. The TFT is formed of thesemiconductor layer 204, source line 201, gate line 202 and drainelectrode 206.

[0032]FIG. 20 is a schematic diagram showing a signal flow at the timeof interrupting the Cs line of the picture element of the conventionalliquid crystal display.

[0033] In the drawing, reference numeral 208 indicates a short circuitpoint between the gate line 202 and the Cs line 203. Numeral 209 is twointerrupting points for interrupting the Cs line 203 on two sides of theshort circuit point 208, and numeral 210 indicates a signal flow of theCs line 203. Sn is a source line, Gk is a gate line, and Vcom is apotential of the common electrode of the opposition substrate. Potentialof the Cs line is equal to that of the common electrode.

[0034] Operation of the conventional liquid crystal display of abovearrangement is hereinafter described.

[0035] When an on signal is applied to the gate line 202, the TFT isturned on, and a predetermined electric charge is written from thesource line 201 in the Cs capacity and the capacity of liquid crystal(hereinafter referred to as C1 c). Then, when the selective signal ofthe gate line 202 is turned off, the TFT is turned off (a highresistance state), and the electric charge written from the source lineis held. An effective voltage determined by the difference between thepotential determined by this electric charge and the potential of thecommon electrode of the opposition substrate is applied to the liquidcrystal, whereby a light transmittance in proportion to the effectivevoltage is obtained. As a result, a desired display is achieved.

[0036] At this time, when varying the selective signal of the gate line202, potential of the drain electrode 206 is changed by a couplingcapacity Cgd of the gate line 202 and the drain electrode 206. Supposingthat the potential variation is Δ Vgd, the ΔVgd is shown in thefollowing expression:

ΔVgd=(Cgd×ΔVg)/(Cgd+Cs+C1c)  (1)

[0037] where: ΔVg is a variation of potential when the signal from thegate line 202 is turned from on to off. Because of the variation ΔVgd ofthe potential of the drain electrode 206, the central potential of thepotential Vcom of the common electrode of the opposition substrate andthe central voltage of the voltage applied to the liquid crystal aredisplaced. It is well known that if the variation is large, there arisesa flicker in image plane, and a phenomenon (hereinafter referred toprinting) takes place in which when a pattern is continuously displayedfor a long time, the same pattern still remains after being switched tothe other pattern, which results in deterioration of display quality. Toprevent such problem, it is necessary to add a predetermined Cs capacityin parallel to the liquid crystal capacity.

[0038] On the other hand, in the liquid crystal display, the lighttransmitted through the part other than the picture element electrode205 brings about a disadvantage of deterioration of display quality suchas lowering in contrast ratio. Accordingly, it is necessary to shade anyleak of light transmitted through the part other than the pictureelement electrode 205. In the conventional liquid crystal display, leakof light from the gap between the picture element electrode 205 and thesource line 201 is shaded by arranging the Cs line 203 in the peripheryof the picture element electrode to form a shade film. In such a case,the Cs line 203 is located in the periphery of the picture elementelectrode along the source line 201, extending to the part near the gateline 202. In this respect, as compared with the case of forming a shadefilm on the array substrate, when shading the leak light by the shadefilm arranged on the opposition substrate, lamination accuracy of theopposition substrate and the array substrate is lower than the patternaccuracy of the array substrate, resulting in a large shading region.Accordingly, when the gap between the gate line 202 and the Cs line 203serving as the shade film is formed as small as possible, the shadingregion by the shade film arranged on the opposition substrate isreduced, and opening ratio is improved.

[0039] In the conventional liquid crystal display of above arrangement,the Cs line 203 performs a function of shading the leak light out of thegap between the picture element electrode 205 and the source line 201,and the Cs line 203 i8s located near the gate line 202. Because the gateline 202 and the Cs line 203 are formed in the same process, therearises a defect of short circuit between the gate line 202 and the Csline 203 due to defective pattern such as foreign matter stuck at thetime of photomechanical process and etching. When occurs such a defectof short circuit, any scanning signal is not supplied normally, which isvisually recognized as defective line. Such a defective line can bedetected by the inspection after completing the manufacturing process ofthe array substrate, and it is possible to cut the defect with a laseror the like. However, in the event that such a defect of short circuittakes place under the source line 201, a problem exists in that wheninterrupting the short circuit portion, the source line 201 is alsointerrupted and visually recognized as defective source line, making itimpossible to repair the defect.

[0040] Moreover, it is certainly possible to cut the Cs line 203 at thetwo interruption points 209 on both sides of the short circuit point 208as shown in FIG. 20. But, in this case, the signal supplied to the Csline 203 is supplied from one side of the image plane. For example, inthe event of interrupting the Cs line 203 in response to a short circuitbetween the gate line 202 and the Cs line 203 near the right end of theimage plane, the signal supplied to the Cs line 203 is supplied from theleft end side of the image plane. Therefore, a load on the Cs line 203is four times as much as the normal supply, and a signal delay occurs.Due to such a signal delay, brightness varies as compared withperipheral picture element, and the Cs line 203 is visually recognizedas defective line that is another problem.

OBJECT OF THE INVENTION

[0041] Accordingly, an object of the present invention is to provide aTFT-LCD (LCD is an abbreviation of liquid crystal display) of highquality in which parasitic capacity Cdp hardly increases and crosstalkis small by arranging a picture element electrode on a source linethrough a Cs line.

[0042] Another object of the invention is to provide a TFT-LCD of highopening ratio and high brightness by forming a picture element electrodeextending to a source line through a Cs line.

[0043] A further object of the invention is to provide a liquid crystaldisplay of high yield.

[0044] A still further object of the invention is to provide amanufacturing method of a liquid crystal display conforming to each ofthe foregoing objects.

SUMMARY OF THE INVENTION

[0045] A liquid crystal display according to the present inventioncomprises a TFT array substrate for use in matrix type display, the TFTarray substrate including a plurality of gate lines arranged on aninsulating substrate with certain distances, a plurality of source linescrossing over the gate lines, and TFT(s) provided at crossover sectionsbetween the gate lines and the source lines, and having picture elementelectrodes connected to drain electrodes forming the TFT(s), and Cslines each forming a Cs capacity by holding an insulating film betweenthe Cs lines and picture element electrodes, wherein the Cs lines arearranged and formed in such a manner as to overlap an upper part of thesource lines.

[0046] In the liquid crystal display according to the invention, it ispreferable that the Cs lines are formed into a mesh-like structurehaving line components in wiring direction of the source lines and thegate lines, in addition to the mentioned construction.

[0047] In the liquid crystal display according to the invention, it ispreferable that the picture element electrodes are arranged and formedin such a manner as to overlap an upper layer of the Cs lines, inaddition to the mentioned construction.

[0048] In the liquid crystal display according to the invention, it ispreferable that the line component in wiring direction of the sourcelines is formed to be wider than the source lines in such a manner as tocover the source lines, in addition to the mentioned construction.

[0049] In the liquid crystal display according to the invention, it ispreferable that the Cs lines are arranged in such a manner as to extendin one direction along the source lines and formed to be wider than thesource lines in such a manner as to cover the source lines, and thepicture element electrodes are arranged and formed in such a manner asto overlap the upper layer of the Cs lines, in addition to the mentionedconstruction.

[0050] In the liquid crystal display according to the invention, it ispreferable that the picture element electrodes and the gate linesoverlaps partially each other, in addition to the mentionedconstruction.

[0051] A manufacturing method of a liquid crystal display according tothe invention comprises the steps of forming source lines, Cs lines andpicture element electrodes in order, and arranging the source lines, Cslines and the picture element electrodes in such a manner that theyoverlap partially one another.

[0052] A liquid crystal display according to the invention comprisespicture electrodes respectively formed in a plurality of matrix-likeregions defined by a plurality of gate lines and a plurality of sourcelines arranged in such a manner as to cross over said gate lines, and Cslines arranged in such a manner as to extend over the plurality ofregions along the gate lines, wherein the Cs lines are arranged in sucha manner that two Cs lines extend within each region, and the two Cslines are connected to each other within a part of the regions.

[0053] In the liquid crystal display according to the invention, it ispreferable that the Cs lines have a wiring section shaped to shade aleak light from between the picture electrodes and the source lines.

[0054] In the liquid crystal display according to the invention, it ispreferable that the Cs lines are connected through the wiring section inthe region where the Cs lines are connected to each other.

[0055] In the liquid crystal display according to the invention, it ispreferable that the two Cs lines are connected to each other at leastwithin two regions.

[0056] In the liquid crystal display according to the invention, it ispreferable that the regions in which the two Cs lines are connected toeach other are arranged with equal distances.

[0057] In the liquid crystal display according to the invention, it ispreferable that the gate lines and the Cs lines are formed into a samelayer.

[0058] A manufacturing method of a liquid crystal display according tothe invention comprises a first step of arranging Cs lines along gatelines in such a manner that two Cs lines extend within a region andforming the gate lines and the Cs lines in such a manner that the two Cslines are connected to each other within a part of the regions, and asecond step of forming source lines in such a manner as to cross overthe gate lines through an insulating film.

[0059] In the manufacturing method of a liquid crystal display accordingto the invention, it is preferable that when a gate line and a Cs lineshort-circuits under a signal line, the Cs line is interrupted on twosides of the source line.

BRIEF DESCRIPTION OF THE DRAWINGS

[0060]FIG. 1 is a plane view of a liquid crystal display according toexample 1 of the present invention.

[0061]FIG. 2 is a view showing a manufacturing step of the liquidcrystal display according to example 1 of the invention.

[0062]FIG. 3 is a view showing a manufacturing step of the liquidcrystal display according to example 1 of the invention.

[0063]FIG. 4 is a view showing a manufacturing step of the liquidcrystal display according to example 1 of the invention.

[0064]FIG. 5 is a view showing a manufacturing step of the liquidcrystal display according to example 1 of the invention.

[0065]FIG. 6 is a view showing a manufacturing step of the liquidcrystal display according to example 1 of the invention.

[0066]FIG. 7 is a view showing a manufacturing step of the liquidcrystal display according to example 1 of the invention.

[0067] FIGS. 8(a) and (b) are sectional views of the liquid crystaldisplay according to example 1 of the invention.

[0068]FIG. 9 is a plane view of a liquid crystal display according toexample 2 of the invention.

[0069]FIG. 10 is a plane view showing a picture element of the liquidcrystal display according to example 3 of the invention.

[0070]FIG. 11 is a plane view showing an interrupting point of the Csline of the picture element of the liquid crystal display according toexample 3 of the invention.

[0071]FIG. 12 is a schematic view showing a signal flow at the time ofinterrupting the Cs line of the picture element of the liquid crystaldisplay according to example 3 of the invention.

[0072] FIGS. 13(a), (b), (c), (d) and (e) are sectional views showing amanufacturing method of the array substrate according to example 3 ofthe invention.

[0073]FIG. 14 is a schematic circuit diagram of a basic liquid crystaldisplay.

[0074]FIG. 15 is a plane view of the liquid crystal display according tothe prior art.

[0075]FIG. 16 is a sectional view of the liquid crystal displayaccording to the prior art.

[0076] FIGS. 17(a), (b), (c), (d) and (e) are sectional views showingmanufacturing steps of the liquid crystal display according to the priorart.

[0077] FIGS. 18(a), (b) and (c) are sectional views showingmanufacturing steps of the liquid crystal display according to the priorart.

[0078]FIG. 19 is a plane view showing a picture element of the liquidcrystal display according to the prior art.

[0079]FIG. 20 is a schematic view showing a signal flow at the time ofinterrupting the Cs line of the picture element of the liquid crystaldisplay according to the prior art.

DESCRIPTION OF THE PREFERRED EMBODIMENT EXAMPLE 1

[0080] Example 1 of the invention is hereinafter described.

[0081] The invention is characterized by its structure in the pictureelement section of TFT array, and a difference from the prior art ishereinafter described with reference to the drawings.

[0082] In a liquid crystal display according to the invention, the Cslines are formed on the upper layer of the source lines to cover them,and the picture element electrodes are further arranged and formed onthe upper layer thereof in such a manner as to overlap partially.

[0083] Basic construction of the liquid crystal display is same as thataccording to the prior art.

[0084]FIG. 1 is a plane view of a liquid crystal display according toexample 1 of the invention. In the drawing, reference numeral 2indicates a gate line, numeral 4 indicates a semiconductor thin filmforming a TFT, numeral 7 is a source line, numeral 8 is a sourceelectrode, numeral 9 is a drain electrode, numeral 11 is a Cs line,numeral 14 is a picture element electrode, and numeral 13 is a contactfor electrically connecting the picture element electrode 14 and thedrain electrode 9. The Cs line 11 is arranged on the source line 7formed extending in longitudinal direction of FIG. 1 through aninsulating film, and the source line 7 is covered by the Cs line 11. Apart of the picture element electrode 14 is arranged on the Cs line 11through the insulating film in such a manner as to overlap the sourceline 7.

[0085] A manufacturing method of the picture element section of thestructure as shown in FIG. 1 is hereinafter described with reference toFIGS. 2 to 7.

[0086] First, as shown in FIG. 2, the gate line 2 is formed on a glasssubstrate (not illustrated). Then, after forming a gate insulating film(not illustrated) on the gate line 2, the semiconductor thin film 4 isarranged on the region serving as the gate electrode on the gate line 2by patterning the semiconductor thin film 4 forming the TFT, as shown inFIG. 3. This semiconductor thin film 4 is a multi-layer film formed bylaminating an i-layer (numeral 5 in FIG. 8(b)) and an n-layer (numeral 6in FIG. 8(b)) in order.

[0087] Thereafter, as shown in FIG. 4, the source line 7, the sourceelectrode 8 and the drain electrode 9 are formed. The source line 7 isarranged in a direction crossing over the extending direction of thegate line 2, and the source electrode 8 being in electrical connectionto the source line 7 is arranged on the semiconductor thin film 4 on thegate line 2. The drain electrode 9 is arranged to be opposite to thesource electrode 8 through a region where a part of the drain electrode9 becomes a channel of the semiconductor thin film 4. At the time ofetching this drain electrode 9, the n-layer forming the semiconductorthin film 4 is simultaneously patterned, while the i-layer is leftwithout being etched.

[0088] Then, after forming a source insulating film, as shown in FIG. 5,the Cs line 11 having a line component in the direction of arranging thesource line 7 and a line component in the direction of the gate line 2is formed by patterning in such a manner as to cover the source line 7.

[0089] Thereafter, after forming a Cs insulating film on the Cs line 11,as shown in FIG. 6, the contact 13 is formed on the drain electrode 9.

[0090] Further, as shown in FIG. 7, the picture element electrode 14 isarranged and formed in such a manner as to overlap the Cs line 11 and atleast one part of the direction component of the source line 2. Thus, astructure having a Cs capacity between the Cs line 11 and the pictureelement electrode 14 is formed.

[0091] In this respect, the Cs line 11 is formed to be wider than thesource line 7 so that a parasitic capacity Cdp generated between thesource line 2 and the picture element electrode 14 is reduced.

[0092] FIGS. 8(a) and (b) show sectional views of the A-A region and B-Bregion in FIG. 7, respectively. In the drawings, reference numeral 3indicates the gate insulating film formed on the gate line 2, numerals 5and 6 indicate respectively the i-layer and the n-layer forming thesemiconductor thin film of the TFT, and numeral 12 is the Cs insulatingfilm formed on the Cs line 11. Same reference numerals as those givenfor the above description are designated to the same or like parts.

[0093] It is understood from these drawings that the Cs line 11 widerthan the source line 7 is formed on the source line 7 in such a manneras to cover the source line 7, and the picture element electrode 14 isarranged and formed in such a manner as to overlap partially the Cs line11.

[0094] As described above, in the TFT of the TFT array according toexample 1 of the invention, since the Cs line 11 is formed on the sourceline 2 through the source insulating film 10 and the picture elementelectrode 14 is formed on the Cs line through the Cs insulating film 12,the distance between the source line 7 and the picture element electrode14 can be reduced, thereby increasing opening ratio, which eventuallyresults in improvement of brightness of LCD.

[0095] In the picture element section of the conventional liquid crystaldisplay, because the Cs line is arranged under the source line and theparasitic capacity between the source line and the picture elementelectrode is large, there is a problem of increasing crosstalk. On theother hand, in the invention, since the Cs line is formed above thesource line 7 in such a manner as to cover the source line 7 and thepicture element electrode 14 is formed above the Cs line 11, theparasitic capacity Cdp between the source line 7 and the picture elementelectrode 14 can be reduced, which results in reduction of crosstalk.

[0096] Further, because the conventional Cs line is arranged in parallelto the gate line and the adjacent Cs line is connected at the end ofpanel, when trying to reduce width of electrode to improve openingratio, line resistance of the Cs line is increased resulting in increaseof crosstalk. On the other hand, by employing the picture elementstructure shown in this example 1, i.e., by forming the Cs line 11 inthe picture element into a ring (the Cs line 11 is mesh-like from theviewpoint of the entire panel) and connecting to the Cs line on theadjacent picture element, it is possible to reduce the Cs lineresistance by not less than two figures. Accordingly, it becomespossible to get a liquid crystal display resistant to crosstalk.

EXAMPLE 2

[0097] Example 2 of the invention is hereinafter described.

[0098] The manufacturing method of the picture element section accordingto this example 2 is same as that shown in example 1, as far as themanufacturing steps before forming a Cs line 11 a are concerned.

[0099] As shown in FIG. 9, the Cs line 11 a dose not form a line sectionparallel to the gate line 2 in the picture element, but is arranged andformed above the source line 7 and an adjacent source line 7 through thesource insulating film by overlapping a part of a picture elementelectrode 14 a on the adjacent gate line 2. The Cs line 11 a is notformed into a ring being different from example 1, but is arranged alongthe longitudinal direction (shorter direction than lateral direction) ofliquid crystal panel. As a result, the line resistance can be restrainedto be small as compared with the arrangement in lateral direction.

[0100] By forming the picture element electrode 14 a shown in FIG. 9,the distance between the source line 7 and the picture element electrode14 a can be reduced thereby improving opening ratio, and it becomespossible to improve brightness of the LCD.

[0101] Further, in the same manner as example 1, since the Cs line 11 ais arranged and formed between the source line 7 and the picture elementelectrode 14 a in such a manner as to cover the source line 7, theparasitic capacity Cdp can be reduced. Thus it becomes possible toreduce crosstalk as a matter of course.

EXAMPLE 3

[0102] Example 3 of the invention is hereinafter described.

[0103]FIG. 10 is a plane view showing a picture element of the liquidcrystal display according to example 3 of the invention. The pictureelement shown in FIG. 10 is arranged forming a matrix and forms adisplay section.

[0104] In the drawing, reference numeral 201 indicates a source line,numeral 202 indicates a gate line arranged crossing over the source line201, and numeral 203 is a Cs line forming a Cs capacity which isarranged along the gate line 202 and formed in the same manufacturingstep as that of the gate line 202.

[0105] Numeral 204 is a semiconductor layer forming a channel of TFT,and numeral 205 is a picture element electrode forming a display sectionand is formed in a region defined by the source line 201 and the gateline 202. Numeral 206 is a drain electrode of TFT which is connected tothe picture element electrode 205. The semiconductor 204, the sourceline 201, the gate line 202 and the drain electrode 206 form a TFT.

[0106]FIG. 11 is a plane view showing an interrupting point of the Csline of the picture element of the liquid crystal display according toexample 3 of the invention.

[0107] In the drawing, reference numerals 201 to 206 are the same asthose in FIG. 10. Numeral 208 is a short circuit point between the gateline 202 and the Cs line 203, and the short circuit takes place underthe source line 201. Numeral 209 is an interrupting point forinterrupting the Cs line 203 on two sides of the short circuit point208.

[0108]FIG. 12 is a schematic view showing a signal flow at the time ofinterrupting point of the Cs line of the picture element of the liquidcrystal display according to example 3 of the invention.

[0109] In the drawing, reference numerals 201 to 203, 208 and 209 arethe same as those in FIG. 11. Numeral 210 indicates a signal flow of theCs line 203. Sn indicates each individual source line, Gk indicates eachindividual gate line, and Vcom is a potential of the common electrode ofthe opposition substrate. Potential of the Cs line is equal to thepotential of the common electrode.

[0110] FIGS. 13(a), (b), (c), (d) and (e) are sectional views showing amanufacturing method of the array substrate according to example 3 ofthe invention.

[0111] In the drawing, reference numerals 202 to 206 are the same asthose in FIG. 10. Reference numeral 212 indicates a transparentsubstrate, numeral 213 indicates a gate insulating film, numeral 214 isa semiconductor layer doped with an impurity formed to make an ohmiccontact with the source line 201 or with the drain electrode 206.Numerals 214 a and 214 b are respectively a source region and a drainregion for making an ohmic contact with the source line 201 or with thedrain electrode 206. Numeral 215 is a protective film formed to protectthe semiconductor layer 204.

[0112] As shown in FIG. 10, the array substrate forming the liquidcrystal display according to the invention is provided with two Cs lines203, and these Cs lines 203 are constructed to have a line section forshading a leak light from the gap between the source line 201 and thepicture element electrode 205. In some picture elements, the two Cslines 203 are separated, while in other picture elements, the two Cslines 203 are connected to each other at either line section provided toshade the leak light from the gap between the source line 201 and thepicture element electrode 205. Further, the two Cs lines 203 arrangedalong the gate line 202 are connected to each other on both sides of theimage plane serving as a display section as shown in FIG. 12.

[0113] In the liquid crystal display of above construction, when thegate line 202 and the Cs lines 203 short-circuit under the source line201 as shown in FIG. 11, the short circuit point 208 is electricallyinterrupted by interrupting the two interrupting points 209 with YAGlaser, for example. The two Cs lines 203 are separated by theinterruption. However, as indicated by the signal flow 210 in FIG. 12,since the two Cs lines are connected to each other in some pictureelement, the signal supplied to the Cs lines 203 are supplied not onlyfrom one side of the image plane but also from two sides, and any signaldelay does not occur.

[0114] Further, even when the Cs lines 203 are interrupted, Cs capacityvalue of the picture element is same as that of normal picture element.As a result, fluctuation of picture element potential due to thepotential fluctuation ΔVgd of the drain electrode and the electriccharge are not different from normal picture element, and any flicker orprinting are not visually recognized at all.

[0115] Then, a manufacturing method of the array substrate of the liquidcrystal display according to the invention is hereinafter described withreference to FIG. 13.

[0116] First, as shown in FIG. 13(a), for example, Cr is formed into thegate line 202 and the Cs line 203 on the transparent substrate 201 inone process. Then, as shown in FIG. 13(b), for example, SiN is formedinto the gate insulating film 213, amorphous Si (hereinafter referred toas a-Si) is formed into the semiconductor layer 204 to serve as achannel, and n+a-Si doped with P ion is formed into the semiconductorlayer 214 doped with impurity ion to make an ohmic contact with the linemetal. These films and layers are continuously formed, and then, exceptthe portion to be the TFT, the n+a-Si and a-Si are removed.

[0117] Subsequently, as shown in FIG. 13(c), for example, ITO is formedinto the picture element electrode 205, and thereafter, as shown in FIG.13(d), for example, Cr is formed into the source line 201 and the drainelectrode 206. And by removing unnecessary n+a-Si, the source region 214a for making an ohmic contact with the source line 201 and the drainregion 214 for making an ohmic contact with the drain electrode 206 areformed. Then, as shown in FIG. 13(e), to protect the channel portionfrom which n+a-Si has been removed, for example, SiN is formed into theprotective film 215. By removing the protective film from the terminalportion, an array substrate of the liquid crystal display according tothe invention is achieved.

[0118] In addition, it is preferable that in the above construction, thetwo Cs lines 203 are connected to each other at any optional pictureelement and the connection points are provided at not less than twopicture elements.

[0119] It is also preferable that the picture elements for connectingthe two Cs lines 203 are disposed with equal distances.

[0120] Though the positions for connecting the two Cs lines 203 for eachgate line 202 are changed, the same advantage is performed withoutchanging the positions.

[0121] Though a channel H type TFT of reverse stagger structure isdescribed in this example, the same advantage is performed also bychannel protection type TFT, TFT of forward stagger structure and TFT ofco-planer structure.

[0122] Though a-Si is used to form the semiconductor layer 204 to serveas a channel, it is also preferable that a polycrystalline Si is used.

[0123] Though Cr is used to form the gate line 202 and the source line201, it is also preferable to use any other metal such as Al, Cu, Ti,Ta, Mo, Al-Si, Al-Si-Cu, Al-Nd, Al-N or laminate thereof.

What is claimed is:
 1. A liquid crystal display comprising a TFT arraysubstrate for use in matrix type display; said TFT array substrateincluding a plurality of gate lines arranged on an insulating substratewith certain distances, a plurality of source lines crossing over saidgate lines, and thin film transistors provided at crossover sectionsbetween said gate lines and said source lines, and having pictureelement electrodes connected to drain electrodes forming said thin filmtransistors, and Cs lines each forming a Cs capacity by holding aninsulating film between the Cs lines and picture element electrodes;wherein said Cs lines are arranged and formed in such a manner as tooverlap an upper part of said source lines.
 2. The liquid crystaldisplay according to claim 1 , wherein the retention capacity electrodelines are formed into a mesh-like structure having line components inwiring direction of the source lines and the gate lines.
 3. The liquidcrystal display according to claim 1 , wherein the picture elementelectrodes are arranged and formed in such a manner as to overlap anupper layer of the retention capacity electrode lines.
 4. The liquidcrystal display according to claim 1 , wherein the line component inwiring direction of the source lines among the retention capacityelectrode lines is formed to be wider than said source lines in such amanner as to cover said source lines.
 5. The liquid crystal displayaccording to claim 1 , wherein the retention capacity electrode linesare arranged in such a manner as to extend in one direction along thesource lines and formed to be wider than said source lines in such amanner as to cover said source electrodes, and the picture elementelectrodes are arranged and formed in such a manner as to overlap theupper layer of said retention capacity electrode lines.
 6. The liquidcrystal display according to claim 1 , wherein the picture elementelectrodes and the gate lines overlaps partially each other.
 7. Amanufacturing method of a liquid crystal display comprising the steps offorming source lines, Cs lines and picture element electrodes in order,and arranging the source lines, the Cs lines and the picture elementelectrodes in such a manner that they overlap partially one another. 8.A liquid crystal display comprising picture electrodes respectivelyformed in a plurality of matrix-like regions defined by a plurality ofgate lines and a plurality of source lines arranged in such a manner asto cross over said gate lines, and retention capacity lines arranged insuch a manner as to extend over said plurality of regions along saidgate lines, wherein said retention capacity lines are arranged in such amanner that two retention capacity lines extend within said plurality ofregions, and said two retention capacity lines are connected to eachother within a part of the regions.
 9. The liquid crystal displayaccording to claim 8 , wherein the retention capacity lines have a linesection shaped to shade a leak light from between the picture electrodesand the source lines.
 10. The liquid crystal display according to claim9 , wherein the retention capacity lines are connected through the linesection in the region where the retention capacity lines are connectedto each other.
 11. The liquid crystal display according to claim 8 ,wherein the two retention capacity lines are connected to each other atleast within two regions.
 12. The liquid crystal display according toclaim 8 , wherein the regions in which the two Cs lines are connected toeach other are arranged with equal distances.
 13. The liquid crystaldisplay according to claim 8 , wherein the gate lines and the retentioncapacity lines are formed in a same step.
 14. A manufacturing method ofa liquid crystal display having picture elements respectively formed ina plurality of regions defined by a plurality of gate lines and aplurality of source lines arranged in such a manner as to cross oversaid gate lines, said method comprising: a first step of arrangingretention capacity lines along the gate lines in such a manner that tworetention capacity lines extend within each of said regions and formingthe gate lines and the Cs lines in such a manner that the two retentioncapacity lines are connected to each other within a part of the regions;and a second step of forming source lines in such a manner as to crossover said gate lines through an insulating film.
 15. The manufacturingmethod of a liquid crystal display according to claim 14 , wherein whena gate line and a retention capacity line short-circuits under a sourceline, the retention capacity line is interrupted on two sides of thesource line.